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In microelectronics manufacturing of silicon wafers adequate wetting of chemicals used in deposition or removal processes is vital to generate high die yields per wafer.

The cleanliness of silicon of coated wafers can be assessed by the consistency of the contact angle over a mapped surface. This is mirrored in the success with which consecutive layers of electronic devices are laid down, during the capacitor manufacturing process.

The surface of the substrate in terms of its polar / non-polar nature and chemistry can be evaluated and quantified by XPS to determine why areas of the wafer are generating the poor wetting characteristics measured by the contact angles to determine the root cause. Wetting can be the result of contaminant layers less than a few nm thick, perhaps left from inadequate or ineffective upstream removal processes or poor cleaning and rinsing steps for example.